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R reuter /

Fichtelbahn-Test

MIT Native

Darlington Array

2-layer
Rendered

1 version

  1. Initial upload latest

    8d3712e · reuter · · rendered in 32.6s

    82×43 mm 2 layers 9 BOM lines 35 warnings 2 ERC errors
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    Rendered attempt 1 · queued last month
    kicad-cli: 10.0.6
Found: Fichtelbahn_GPIO_Addon.kicad_pcb / Fichtelbahn_GPIO_Addon.kicad_sch
bom: ok
schematic svg: ok
schematic sheets: 1
schematic pdf: ok
erc: ok
pcb layers: ok
pcb layers stored: 14/14
preview front: ok
preview back: ok
ibom: ok
glb: ok
glb optimized: 9191832 → 2721556 bytes, 22 meshes, 943 ms
step: ok
drc: ok
gerbers jlcpcb: ok, drill: ok
gerbers aisler: ok, drill: ok
gerbers generic: ok, drill: ok
thumbnail sheet-0: webp
thumbnail preview-front: webp